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https://github.com/wolfpld/tracy.git
synced 2025-03-20 07:40:02 +08:00
PIDs are no longer needed in samples.
This commit is contained in:
parent
bbd1c4505c
commit
b1e4d16537
@ -788,7 +788,7 @@ static void SetupSampling( int64_t& samplingPeriod )
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pe.type = PERF_TYPE_HARDWARE;
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pe.type = PERF_TYPE_HARDWARE;
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pe.size = sizeof( perf_event_attr );
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pe.size = sizeof( perf_event_attr );
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pe.sample_freq = 10000;
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pe.sample_freq = 10000;
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pe.sample_type = PERF_SAMPLE_IP | PERF_SAMPLE_TID;
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pe.sample_type = PERF_SAMPLE_IP;
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pe.disabled = 1;
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pe.disabled = 1;
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pe.exclude_kernel = 1;
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pe.exclude_kernel = 1;
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pe.exclude_guest = 1;
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pe.exclude_guest = 1;
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@ -888,7 +888,6 @@ static void SetupSampling( int64_t& samplingPeriod )
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SetThreadName( "Tracy Sampling" );
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SetThreadName( "Tracy Sampling" );
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sched_param sp = { 5 };
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sched_param sp = { 5 };
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pthread_setschedparam( pthread_self(), SCHED_FIFO, &sp );
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pthread_setschedparam( pthread_self(), SCHED_FIFO, &sp );
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uint32_t currentPid = (uint32_t)getpid();
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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for( int i=0; i<s_numBuffers; i++ )
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for( int i=0; i<s_numBuffers; i++ )
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{
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{
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@ -926,75 +925,70 @@ static void SetupSampling( int64_t& samplingPeriod )
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// u64 cnt
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// u64 cnt
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// u64 ip[cnt]
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// u64 ip[cnt]
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uint32_t pid;
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uint32_t tid;
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s_ring[i].Read( &pid, offset, sizeof( uint32_t ) );
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uint64_t t0;
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if( pid == currentPid )
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uint64_t cnt;
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offset += sizeof( uint32_t );
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s_ring[i].Read( &tid, offset, sizeof( uint32_t ) );
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offset += sizeof( uint32_t );
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s_ring[i].Read( &t0, offset, sizeof( uint64_t ) );
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offset += sizeof( uint64_t );
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s_ring[i].Read( &cnt, offset, sizeof( uint64_t ) );
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offset += sizeof( uint64_t );
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if( cnt > 0 )
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{
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{
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uint32_t tid;
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auto trace = (uint64_t*)tracy_malloc( ( 1 + cnt ) * sizeof( uint64_t ) );
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uint64_t t0;
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s_ring[i].Read( trace+1, offset, sizeof( uint64_t ) * cnt );
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uint64_t cnt;
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offset += sizeof( uint32_t );
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s_ring[i].Read( &tid, offset, sizeof( uint32_t ) );
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offset += sizeof( uint32_t );
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s_ring[i].Read( &t0, offset, sizeof( uint64_t ) );
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offset += sizeof( uint64_t );
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s_ring[i].Read( &cnt, offset, sizeof( uint64_t ) );
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offset += sizeof( uint64_t );
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if( cnt > 0 )
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{
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auto trace = (uint64_t*)tracy_malloc( ( 1 + cnt ) * sizeof( uint64_t ) );
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s_ring[i].Read( trace+1, offset, sizeof( uint64_t ) * cnt );
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#if defined __x86_64__ || defined _M_X64
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#if defined __x86_64__ || defined _M_X64
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// remove non-canonical pointers
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// remove non-canonical pointers
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do
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do
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{
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{
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const auto test = (int64_t)trace[cnt];
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const auto test = (int64_t)trace[cnt];
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const auto m1 = test >> 63;
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const auto m1 = test >> 63;
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const auto m2 = test >> 47;
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const auto m2 = test >> 47;
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if( m1 == m2 ) break;
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if( m1 == m2 ) break;
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}
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}
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while( --cnt > 0 );
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while( --cnt > 0 );
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for( uint64_t j=1; j<cnt; j++ )
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for( uint64_t j=1; j<cnt; j++ )
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{
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{
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const auto test = (int64_t)trace[j];
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const auto test = (int64_t)trace[j];
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const auto m1 = test >> 63;
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const auto m1 = test >> 63;
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const auto m2 = test >> 47;
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const auto m2 = test >> 47;
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if( m1 != m2 ) trace[j] = 0;
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if( m1 != m2 ) trace[j] = 0;
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}
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}
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#endif
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#endif
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// skip kernel frames
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// skip kernel frames
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uint64_t j;
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uint64_t j;
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for( j=0; j<cnt; j++ )
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for( j=0; j<cnt; j++ )
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{
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if( (int64_t)trace[j+1] >= 0 ) break;
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}
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if( j == cnt )
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{
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tracy_free( trace );
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}
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else
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{
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if( j > 0 )
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{
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{
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if( (int64_t)trace[j+1] >= 0 ) break;
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cnt -= j;
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memmove( trace+1, trace+1+j, sizeof( uint64_t ) * cnt );
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}
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}
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if( j == cnt )
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memcpy( trace, &cnt, sizeof( uint64_t ) );
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{
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tracy_free( trace );
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}
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else
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{
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if( j > 0 )
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{
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cnt -= j;
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memmove( trace+1, trace+1+j, sizeof( uint64_t ) * cnt );
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}
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memcpy( trace, &cnt, sizeof( uint64_t ) );
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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t0 = s_ring[i].ConvertTimeToTsc( t0 );
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t0 = s_ring[i].ConvertTimeToTsc( t0 );
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#endif
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#endif
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TracyLfqPrepare( QueueType::CallstackSample );
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TracyLfqPrepare( QueueType::CallstackSample );
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MemWrite( &item->callstackSampleFat.time, t0 );
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MemWrite( &item->callstackSampleFat.time, t0 );
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MemWrite( &item->callstackSampleFat.thread, (uint64_t)tid );
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MemWrite( &item->callstackSampleFat.thread, (uint64_t)tid );
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MemWrite( &item->callstackSampleFat.ptr, (uint64_t)trace );
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MemWrite( &item->callstackSampleFat.ptr, (uint64_t)trace );
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TracyLfqCommit;
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TracyLfqCommit;
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}
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}
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}
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}
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}
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}
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}
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@ -1002,45 +996,39 @@ static void SetupSampling( int64_t& samplingPeriod )
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{
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{
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// Layout:
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// Layout:
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// u64 ip
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// u64 ip
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// u32 pid, tid
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uint32_t pid;
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uint64_t ip;
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s_ring[i].Read( &pid, offset + sizeof( uint64_t ), sizeof( uint32_t ) );
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s_ring[i].Read( &ip, offset, sizeof( uint64_t ) );
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if( pid == currentPid )
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QueueType type;
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switch( id )
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{
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{
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uint64_t ip;
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case EventCpuCycles:
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s_ring[i].Read( &ip, offset, sizeof( uint64_t ) );
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type = QueueType::HwSampleCpuCycle;
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break;
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QueueType type;
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case EventInstructionsRetired:
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switch( id )
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type = QueueType::HwSampleInstructionRetired;
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{
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break;
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case EventCpuCycles:
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case EventCacheReference:
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type = QueueType::HwSampleCpuCycle;
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type = QueueType::HwSampleCacheReference;
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break;
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break;
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case EventInstructionsRetired:
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case EventCacheMiss:
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type = QueueType::HwSampleInstructionRetired;
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type = QueueType::HwSampleCacheMiss;
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break;
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break;
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case EventCacheReference:
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case EventBranchRetired:
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type = QueueType::HwSampleCacheReference;
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type = QueueType::HwSampleBranchRetired;
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break;
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break;
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case EventCacheMiss:
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case EventBranchMiss:
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type = QueueType::HwSampleCacheMiss;
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type = QueueType::HwSampleBranchMiss;
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break;
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break;
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case EventBranchRetired:
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default:
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type = QueueType::HwSampleBranchRetired;
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assert( false );
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break;
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break;
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case EventBranchMiss:
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type = QueueType::HwSampleBranchMiss;
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break;
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default:
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assert( false );
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break;
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}
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TracyLfqPrepare( type );
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MemWrite( &item->hwSample.ip, ip );
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TracyLfqCommit;
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}
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}
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TracyLfqPrepare( type );
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MemWrite( &item->hwSample.ip, ip );
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TracyLfqCommit;
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}
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}
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}
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}
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s_ring[i].Advance( hdr.size );
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s_ring[i].Advance( hdr.size );
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