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Sample time for hardware samples.
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parent
1616411257
commit
2765be92fb
@ -807,7 +807,7 @@ static void SetupSampling( int64_t& samplingPeriod )
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pe.type = PERF_TYPE_HARDWARE;
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pe.type = PERF_TYPE_HARDWARE;
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pe.size = sizeof( perf_event_attr );
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pe.size = sizeof( perf_event_attr );
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pe.sample_freq = 5000;
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pe.sample_freq = 5000;
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pe.sample_type = PERF_SAMPLE_IP;
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pe.sample_type = PERF_SAMPLE_IP | PERF_SAMPLE_TIME;
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pe.disabled = 1;
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pe.disabled = 1;
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pe.exclude_kernel = 1;
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pe.exclude_kernel = 1;
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pe.exclude_guest = 1;
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pe.exclude_guest = 1;
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@ -1022,39 +1022,49 @@ static void SetupSampling( int64_t& samplingPeriod )
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{
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{
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// Layout:
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// Layout:
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// u64 ip
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// u64 ip
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// u64 time
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uint64_t ip;
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uint64_t ip, t0;
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s_ring[i].Read( &ip, offset, sizeof( uint64_t ) );
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s_ring[i].Read( &ip, offset, sizeof( uint64_t ) );
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offset += sizeof( uint64_t );
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s_ring[i].Read( &t0, offset, sizeof( uint64_t ) );
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QueueType type;
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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switch( id )
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t0 = s_ring[i].ConvertTimeToTsc( t0 );
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if( t0 != 0 )
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#endif
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{
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{
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case EventCpuCycles:
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QueueType type;
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type = QueueType::HwSampleCpuCycle;
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switch( id )
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break;
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{
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case EventInstructionsRetired:
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case EventCpuCycles:
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type = QueueType::HwSampleInstructionRetired;
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type = QueueType::HwSampleCpuCycle;
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break;
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break;
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case EventCacheReference:
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case EventInstructionsRetired:
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type = QueueType::HwSampleCacheReference;
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type = QueueType::HwSampleInstructionRetired;
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break;
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break;
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case EventCacheMiss:
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case EventCacheReference:
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type = QueueType::HwSampleCacheMiss;
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type = QueueType::HwSampleCacheReference;
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break;
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break;
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case EventBranchRetired:
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case EventCacheMiss:
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type = QueueType::HwSampleBranchRetired;
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type = QueueType::HwSampleCacheMiss;
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break;
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break;
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case EventBranchMiss:
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case EventBranchRetired:
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type = QueueType::HwSampleBranchMiss;
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type = QueueType::HwSampleBranchRetired;
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break;
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break;
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default:
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case EventBranchMiss:
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assert( false );
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type = QueueType::HwSampleBranchMiss;
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break;
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break;
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}
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default:
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assert( false );
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break;
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}
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TracyLfqPrepare( type );
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TracyLfqPrepare( type );
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MemWrite( &item->hwSample.ip, ip );
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MemWrite( &item->hwSample.ip, ip );
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TracyLfqCommit;
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MemWrite( &item->hwSample.time, t0 );
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TracyLfqCommit;
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}
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}
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}
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}
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}
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s_ring[i].Advance( hdr.size );
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s_ring[i].Advance( hdr.size );
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@ -482,6 +482,7 @@ struct QueueTidToPid
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struct QueueHwSample
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struct QueueHwSample
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{
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{
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uint64_t ip;
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uint64_t ip;
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int64_t time;
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};
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};
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enum class PlotFormatType : uint8_t
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enum class PlotFormatType : uint8_t
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